Switch-Level Timing Simulation of MOS VLSI Circuits
Kirjailija:
Nidottu, 2011
englanti
143,10 €
Lisää toivelistalle
Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging.
- Kirjailija
- Rao Vasant B., Overhauser David V., Trick Timothy N., Hajj Ibrahim N.
- ISBN
- 9781461289630
- Kieli
- englanti
- Paino
- 281 grammaa
- Julkaisupäivä
- 5.10.2011
- Kustantaja
- Springer-Verlag New York Inc.
- Sivumäärä
- 210
