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Simulated Annealing for VLSI Design
Tallenna

Simulated Annealing for VLSI Design

This monograph represents a summary of our work in the last two years in applying the method of simulated annealing to the solution of problems that arise in the physical design of VLSI circuits.
Painos
1988 ed.
ISBN
9780898382563
Kieli
englanti
Paino
446 grammaa
Julkaisupäivä
31.3.1988
Sivumäärä
202