Siirry suoraan sisältöön
Routing Congestion in VLSI Circuits
Tallenna

Routing Congestion in VLSI Circuits

With dramatic increases in on-chip packing densities, routing congestion has become a major problem in integrated circuit design, impacting convergence, performance, and yield, and complicating the synthesis of critical interc- nects.
Alaotsikko
Estimation and Optimization
Painos
Softcover reprint of hardcover 1st ed. 2007
ISBN
9781441940131
Kieli
englanti
Paino
310 grammaa
Julkaisupäivä
29.11.2010
Sivumäärä
250