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Principles of Verifiable RTL Design
Tallenna

Principles of Verifiable RTL Design

System designers, computer scientists and engineers have c- tinuously invented and employed notations for modeling, speci- ing, simulating, documenting, communicating, teaching, verifying and controlling the designs of digital systems.
Alaotsikko
A functional coding style supporting verification processes in Verilog
Painos
2nd ed. 2001. Softcover reprint of the original 2nd ed. 2001
ISBN
9781475774184
Kieli
englanti
Paino
310 grammaa
Julkaisupäivä
23.3.2013
Sivumäärä
282