Tallenna
Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits
Kirjailija:
nidottu, 2010
englanti
Final test consists of checking device functionality by exercising RF tests and by applying a comprehensive suite of digital test methods such as I , delay fault testing, DDQ stuck-at testing, low-voltage testing, etc.
- Kirjailija
- Manoj Sachdev, José Pineda de Gyvez
- Painos
- Softcover reprint of hardcover 2nd ed. 2007
- ISBN
- 9781441942852
- Kieli
- englanti
- Paino
- 310 grammaa
- Julkaisupäivä
- 10.11.2010
- Kustantaja
- Springer-Verlag New York Inc.
- Sivumäärä
- 328
