Higher circuit densities, increasingly more complex application ohjectives, and advanced packaging technologies have suhstantially increased the need to incorporate defect-tolerance and fault-tolerance in the design of VLSI and WSI systems. The goals of defect-tolerance and fault-tolerance are yield enhancement and improved reliahility. The emphasis on this area has resulted in a new field of interdisciplinary scientific research. I n fact, advanced methods of defect/fault control and tolerance are resulting in enhanced manufacturahility and productivity of integrated circuit chips, VI.SI systems, and wafer scale integrated circuits. In 1987, Dr. W. Moore organized an "e;International Workshop on Designing for Yield"e; at Oxford University. Edited papers of that workshop were published in reference [II. The participants in that workshop agreed that meetings of this type should he con- tinued. preferahly on a yearly hasis. It was Dr. I. Koren who organized the "e;IEEE Inter national Workshop on Defect and Fault Tolerance in VLSI Systems"e; in Springfield Massachusetts the next year. Selected papers from that workshop were puhlished as the first volume of this series [21.