Spar
Cache and Interconnect Architectures in Multiprocessors
heftet, 2011
Engelsk
Cache And Interconnect Architectures In Multiprocessors Eilat, Israel May 25-261989 Michel Dubois UniversityofSouthernCalifornia Shreekant S. Thakkar SequentComputerSystems The aim of the workshop was to bring together researchers working on cache coherence protocols for shared-memory multiprocessors with various interconnect architectures.
- Redaktør
- Michel Dubois, Shreekant S. Thakkar
- Opplag
- Softcover reprint of the original 1st ed. 1990
- ISBN
- 9781461288244
- Språk
- Engelsk
- Vekt
- 310 gram
- Utgivelsesdato
- 19.9.2011
- Antall sider
- 277
