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VLSI Specification, Verification and Synthesis
Tallenna

VLSI Specification, Verification and Synthesis

VLSI Specification, Verification and Synthesis Proceedings of a workshop held in Calgary from 12-16 January 1987.
Painos
Softcover reprint of the original 1st ed. 1987
ISBN
9781461291978
Kieli
englanti
Paino
310 grammaa
Julkaisupäivä
14.8.2013
Sivumäärä
404