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VHDL: A logic synthesis approach
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VHDL: A logic synthesis approach

Kirjailija:
sidottu, 1997
englanti
This book is structured in a practical, example-driven, manner. The use of VHDL for constructing logic synthesisers is one of the aims of the book; the second is the application of the tools to the design process. An appendix on logic design the source code are available free of charge over the Internet.
Kirjailija
D. Naylor, S. Jones
Painos
1997 ed.
ISBN
9780412616501
Kieli
englanti
Paino
446 grammaa
Julkaisupäivä
31.7.1997
Sivumäärä
340