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System Level Design from HW/SW to Memory for Embedded Systems
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System Level Design from HW/SW to Memory for Embedded Systems

The papers present a broad discussion on the design, analysis and verification of embedded and cyber-physical systems including design methodologies, verification, performance analysis, and real-time systems design.
Alaotsikko
5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguaçu, Brazil, November 3–6, 2015, Proceedings
Painos
Softcover Reprint of the Original 1st 2017 ed.
ISBN
9783030079178
Kieli
englanti
Paino
310 grammaa
Julkaisupäivä
11.12.2018
Sivumäärä
231