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Quick-Turnaround ASIC Design in VHDL
Tallenna

Quick-Turnaround ASIC Design in VHDL

On the other hand, the bottom-up approach starts from a detailed low-level design where performance can be directly assessed, but where the requisite design and interface detail take a long time to generate.
The methodology provided makes good use of extant design tools, and is realistic in terms of the industrial design process.
Alaotsikko
Core-Based Behavioral Synthesis
Painos
Softcover reprint of the original 1st ed. 1996
ISBN
9781461286127
Kieli
englanti
Paino
310 grammaa
Julkaisupäivä
28.9.2011
Sivumäärä
180