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Planar Double-Gate Transistor
Tallenna

Planar Double-Gate Transistor

sidottu, 2009
englanti
Until the 1990s, the reduction of the minimum feature sizes used to fabricate in- grated circuits, called “scaling”, has highlighted serious advantages as integration density, speed, power consumption, functionality and cost.
Alaotsikko
From technology to circuit
Painos
2009 ed.
ISBN
9781402093272
Kieli
englanti
Paino
446 grammaa
Julkaisupäivä
30.1.2009
Sivumäärä
211