Tallenna
Low Power Digital CMOS Design
Power consumption has become a major design consideration for battery-operated, portable systems as well as high-performance, desktop systems.
Potentially one of the most important techniques involves combining architecture optimization with voltage scaling, allowing a trade-off between silicon area and low-power operation.
Potentially one of the most important techniques involves combining architecture optimization with voltage scaling, allowing a trade-off between silicon area and low-power operation.
- Kirjailija
- Anantha P. Chandrakasan, Robert W. Brodersen
- Painos
- Softcover reprint of the original 1st ed. 1995
- ISBN
- 9781461359845
- Kieli
- englanti
- Paino
- 310 grammaa
- Julkaisupäivä
- 4.10.2012
- Kustantaja
- Springer-Verlag New York Inc.
- Sivumäärä
- 409
