Siirry suoraan sisältöön
Logic Synthesis for Low Power VLSI Designs
Tallenna

Logic Synthesis for Low Power VLSI Designs

Logic Synthesis for Low Power VLSI Designs presents a systematic and comprehensive treatment of power modeling and optimization at the logic level.
Painos
Softcover reprint of the original 1st ed. 1998
ISBN
9781461374909
Kieli
englanti
Paino
310 grammaa
Julkaisupäivä
24.10.2012
Sivumäärä
236