Tallenna
Fast Simulation of Computer Architectures
nidottu, 2012
englanti
Chapters in Fast Simulation of Computer Architectures cover topics such as how to collect traces, emulate instruction sets, simulate microprocessors using execution-driven techniques, evaluate memory hierarchies, apply statistical sampling to simulation, and how to augment simulation with performance bound models.
- Toimittaja
- Thomas M. Conte, Charles E. Gimarc
- Painos
- Softcover reprint of the original 1st ed. 1995
- ISBN
- 9781461360025
- Kieli
- englanti
- Paino
- 310 grammaa
- Julkaisupäivä
- 12.10.2012
- Kustantaja
- Springer-Verlag New York Inc.
- Sivumäärä
- 244
