Siirry suoraan sisältöön
Digital System Test and Testable Design
Tallenna

Digital System Test and Testable Design

sidottu, 2010
englanti
This book is about digital system testing and testable design. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions.
Alaotsikko
Using HDL Models and Architectures
Painos
2011 ed.
ISBN
9781441975478
Kieli
englanti
Paino
446 grammaa
Julkaisupäivä
20.12.2010
Sivumäärä
435