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Digital Logic Design Using Verilog
Tallenna

Digital Logic Design Using Verilog

This book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. The book also describes advanced RTL design concepts such as low-power design, multiple clock-domain design, and SOC-based design.
Alaotsikko
Coding and RTL Synthesis
Painos
Softcover reprint of the original 1st ed. 2016
ISBN
9788132238386
Kieli
englanti
Paino
310 grammaa
Julkaisupäivä
27.5.2018
Sivumäärä
416