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Die-stacking Architecture
Tallenna

Die-stacking Architecture

The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors.
ISBN
9783031006197
Kieli
englanti
Paino
310 grammaa
Julkaisupäivä
10.6.2015
Sivumäärä
113