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Device-Level Modeling and Synthesis of High-Performance Pipeline ADCs
Tallenna

Device-Level Modeling and Synthesis of High-Performance Pipeline ADCs

This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles.
Painos
2011 ed.
ISBN
9781489993182
Kieli
englanti
Paino
310 grammaa
Julkaisupäivä
26.11.2014
Sivumäärä
209