Circuit Synthesis with VHDL

One of the main applications of VHDL is the synthesis of electronic circuits. This study is an introduction to the use of VHDL logic (RTL) synthesis tools in circuit design. The modelling styles proposed are independent of specific market tools and focus on constructs widely recognized as synthesizable by synthesis tools. A statement of the prerequisites for synthesis is followed by a short introduction to the VHDL concepts used in synthesis. Two possible approaches to synthesis are presented: the first starts with VHDL features and derives hardware counterparts; the second starts from a given hardware component and derives several description styles. The book also describes how to introduce the synthesis design cycle into existing design methodologies and the standard synthesis environment and concludes with a case study providing a realistic example of the design flow from behavioural description down to the synthesized level. This text should be of interest to students, researchers, design engineers and managers working with VHDL in a synthesis environment.