Tallenna
Cache and Interconnect Architectures in Multiprocessors
nidottu, 2011
englanti
Cache And Interconnect Architectures In Multiprocessors Eilat, Israel May 25-261989 Michel Dubois UniversityofSouthernCalifornia Shreekant S. Thakkar SequentComputerSystems The aim of the workshop was to bring together researchers working on cache coherence protocols for shared-memory multiprocessors with various interconnect architectures.
- Toimittaja
- Michel Dubois, Shreekant S. Thakkar
- Painos
- Softcover reprint of the original 1st ed. 1990
- ISBN
- 9781461288244
- Kieli
- englanti
- Paino
- 310 grammaa
- Julkaisupäivä
- 19.9.2011
- Kustantaja
- Springer-Verlag New York Inc.
- Sivumäärä
- 277
