Siirry suoraan sisältöön
A Parallel Algorithm Synthesis Procedure for High-Performance Computer Architectures
Tallenna

A Parallel Algorithm Synthesis Procedure for High-Performance Computer Architectures

This, coupled with the fact that parallel computer architectures rarely last more than a couple of years, makes for a complex and challenging design environment.

To navigate this environment, algorithm designers need a road map, a detailed procedure they can use to efficiently develop high performance, portable parallel algorithms.

Painos
Softcover reprint of the original 1st ed. 2003
ISBN
9781461346586
Kieli
englanti
Paino
310 grammaa
Julkaisupäivä
5.9.2012
Sivumäärä
108