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SVA: The Power of Assertions in SystemVerilog
This book is a comprehensive guide to assertion-based verification of hardware designs using System Verilog Assertions (SVA). The book makes SVA usable and accessible for hardware designers, verification engineers, formal verification specialists and EDA tool developers.
- Författare
- Eduard Cerny, Surrendra Dudani, John Havlicek, Dmitry Korchemny
- Upplaga
- Softcover reprint of the original 2nd ed. 2015
- ISBN
- 9783319331096
- Språk
- Engelska
- Vikt
- 310 gram
- Utgivningsdatum
- 2016-08-23
- Sidor
- 590
