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SystemVerilog for Verification
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SystemVerilog for Verification

Författare:
Engelska
It also reviews SystemVerilog 3.0 topics such as interfaces and data types.

This second edition contains a new chapter that covers programs and interfaces as well as chapters with updated information on directed testbench and OOP, layered, and random testbench for an ATM switch.

Undertitel
A Guide to Learning the Testbench Language Features
Författare
Chris Spear
Upplaga
Second Edition 2008
ISBN
9781441945617
Språk
Engelska
Vikt
310 gram
Utgivningsdatum
2010-11-05
Sidor
429