Gå direkt till innehållet
Switch-Level Timing Simulation of MOS VLSI Circuits
Spara

Switch-Level Timing Simulation of MOS VLSI Circuits

Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging.
Upplaga
Softcover reprint of the original 1st ed. 1989
ISBN
9781461289630
Språk
Engelska
Vikt
310 gram
Utgivningsdatum
2011-10-05
Sidor
210