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Improving Performance and Reducing Power with Hardware Acceleration - Static Timing Analysis Based Transformations of Combinational Logic in a High Level ASIC Synthesis Flow
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Improving Performance and Reducing Power with Hardware Acceleration - Static Timing Analysis Based Transformations of Combinational Logic in a High Level ASIC Synthesis Flow

pocket, 2008
Engelska
ISBN
9783639106909
Språk
Engelska
Vikt
141 gram
Utgivningsdatum
2008-12-30
Förlag
VDM Verlag
Sidor
96