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Cache and Interconnect Architectures in Multiprocessors
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Cache and Interconnect Architectures in Multiprocessors

Engelska
Cache And Interconnect Architectures In Multiprocessors Eilat, Israel May 25-261989 Michel Dubois UniversityofSouthernCalifornia Shreekant S. Thakkar SequentComputerSystems The aim of the workshop was to bring together researchers working on cache coherence protocols for shared-memory multiprocessors with various interconnect architectures.
Upplaga
Softcover reprint of the original 1st ed. 1990
ISBN
9781461288244
Språk
Engelska
Vikt
310 gram
Utgivningsdatum
2011-09-19
Sidor
277